This is a basically the simplest possible pipelined CPU. It was the final project for my computer architecture class. It is written in VHDL and can be compiled using ghdl. The CPU is Turing complete, but it only recognizes a very small subset of the full MIPS instruction set. It implements the following MIPS instructions:

Arithmetic instructions:

Branching instructions:

Memory operations:

other instructions:

Basic architecture


The code for this project is available on github: http://github.com/jncraton/MIPS-Lite

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